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電子發(fā)燒友網(wǎng)>電子資料下載>類型>參考設(shè)計(jì)>AD6676:高動(dòng)態(tài)范圍寬帶接收器Ad6676評(píng)估板的設(shè)計(jì)工具和啟動(dòng)指南

AD6676:高動(dòng)態(tài)范圍寬帶接收器Ad6676評(píng)估板的設(shè)計(jì)工具和啟動(dòng)指南

2021-05-24 | pdf | 68.64KB | 次下載 | 3積分

資料介紹

This version (11 Jan 2021 08:29) was approved by Ioana Chelaru.The Previously approved version (29 Sep 2020 02:03) is available.Diff

AD6676 : Design Tools and Startup Guide for the AD6676 evaluation board, a high dynamic range, Wideband Receiver

Summary

This wiki site includes information about the AD6676 and the associated evaluation board, the AD6676EBZ.

The AD6676 datasheet provides a significant amount of information to aid in understanding the AD6676 capabilities and can assist in the evaluation process. The datasheet along with the user guide and other board files provided here should be consulted when using the evaluation board.

The AD6676 is compatible with the HSC-ADC-EVALEZ, the ADI FPGA-Based Data Capture Kit.

The software required to use the AD6676EBZ with the HSC-ADC-EVALEZ capture board can be downloaded at the following Analog Devices ftp site:

AD6676 Evaluation Software

For additional information or questions, send an email to highspeed.converters@analog.com. The user guide describes the AD6676 evaluation board, AD6676EBZ, which provides all of the support circuitry required to operate the part in various modes and configurations. The application software used to interface with the devices is also described.



Features

  • Full featured evaluation board with FMC connector for the AD6676, a Wideband IF Receiver Subsystem
  • High Instantaneous dynamic range
    • IIP up to 36 dBm,
    • NSD as low as -159 dBFS/Hz,
    • Noise Figure as low as 13 dB
    • Spurious tones < -97 dBFS
  • On chip digital Signal Processing including
    • NCO and quadrature digital downconverter
    • Decimation
    • AGC Configuration
  • SPI interface for setup and control
  • JESD204B single or dual lane outputs
  • On-board LDO regulator powered through the FMC interface
  • MATLAB (R) User Interface provides complete AD6676 configuration based on user entries


AD6676 Evaluation Platform User Guides

User Guide for the AD6676 ad6676_evb_rev1_quickstartguide_2015_03_27.pdf (UPDATED March 2015)



AD6676 Evaluation Board Files

AD6676 Evaluation Board Schematic Board 13029 Rev D SCHEMATIC [PDF File]
AD6676 Evaluation Board Gerber Files Board 13029 Rev D GERBERS [Zip File]
AD6676 Evaluation Board BOM File Board 13029 Rev D Bill of Material [XLS file]


AD6676 Software Files

AD6676 DemoTool Software Installation Files : AD6676 Evaluation Software



AD6676 Evaluation Board HDL Libraries and Project

The link below is to an external website which has a project with HDL code that can be used with some FPGA development board to interface to the AD6676

External Link to github.com AD6676 library
External Link to github.com AD6676 project
External Link to general github.com website


AD6676 Ibis Model Files

AD6676 Ibis Model AD6676 Ibis [ZIP file]



AD6676 Ibis AMI Model Files

AD6676 Ibis AMI Model Email highspeed.converters@analog.com to request


AD6676 Simulink Model Package AD6676 Simulink Model
AD6676 Simulink User's Guide AD6676 Simulink User's Guide [pdf file]

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